Anritsu MP1763C Pulse Pattern Generator

Today’s demand for transfer of large amounts of data, such as video, over the internet, is resulting in expansion of high-speed transmission circuits and other infrastructure. In addition to the previously used STM-64/OC-192 (9.95328 Gbit/s) standards, we are also seeing use of 10.709225 Gbit/s (OTU-2), which includes FEC coding, as well as 3.125 Gbit/s x 4 and 10.3125 Gbit/s in 10 Gbit Ethernet. Furthermore, the Fibre Channel file transfer protocol at 4.25 Gbit/s is also coming into actual use.

As these new standards are settled upon, there is an urgent need to be able to support evaluation of devices and circuits at these higher bit rates.

The Anritsu MP1763C Pulse Pattern Generator and MP1764C/1764D Error Detector are a BERTS (Bit Error Rate Test Set) supporting evaluation and testing of transmission equipment, high-speed devices, optical modules, etc., at every stage from R&D through to manufacturing and production at speeds from 50 Mbit/s to 12.5 Gbit/s.

Features

• Internal Clock (Option 01)
  • Can be set in units of 1 kHz over the range from 50 MHz to 12.5 GHz
• Programmable Patterns
  • 8-Mbit programmable pattern (can set six STM-64 frames)
  • 4-Mbit alternate pattern
  • Zero substitution pattern
  • PRBS pattern from 2'7-1 to 2'31-1 selectable and its mark ratiocan be varied.
• Synchronous Output
  • The 1/64 clock or pattern SYNC selectable.
  • The trigger position variable for the pattern SYNC
• DATA Output
  • DATA/DATA complementary output with back termination
• CLOCK Output
  • CLOCK 1/CLOCK 1, CLOCK 2 (3 systems)
  • CLOCK 1/CLOCK 1 with back termination
• Parallel Output
  • Useful for testing an 8:1 MUX (changeable to 1/4 speed output with option)
  • 1/8 parallel output is standard. 1/4 parallel output (Option 03) or 1/4 differential output (Option 08) can be selected exclusively.
  • It can be used as a data generator for evaluation of MUX
    devices, WDM transmission equipment, high-speed buses, backplanes, etc.